1. Field of the Invention
The present invention relates to a protecting element and a semiconductor device using the same. More particularly, the present invention relates to a protecting element which allows a significant improvement in an electrostatic breakdown voltage without deteriorating high-frequency characteristics or a computation processing speed of each element to be protected, and a semiconductor device using the protecting element.
2. Description of the Related Art
In a conventional semiconductor device, there has been adopted a method of connecting electrostatic breakdown protecting diodes in parallel with a device including a pn junction, a Schottky junction or a capacitor, which are weak in electrostatic breakdown, in order to protect the device from static electricity in general.
FIG. 21 shows an electrostatic breakdown protecting circuit of a conventional semiconductor device. The electrostatic breakdown protection circuit adopts the following configuration to connect itself to an internal circuit. Specifically, pn junction diodes D1 and D2 are formed near a bonding pad 301 for external input and output. In addition, the anode of the diode D1 is connected to the bonding pad 301, and the cathode thereof is connected to a power-supply terminal Vcc. Moreover, the cathode of the diode D2 is connected to the bonding pad 301, and the anode thereof is connected to a ground terminal. Furthermore, an electrode wiring 302 extended from the bonding pad 301 is connected to one end of a resistor region 303 formed of a p-type diffusion region, and the other end of the resistor region 303 is connected to an electrode wiring 304. This technology is described for instance in Japanese Patent Application Publication No. Hei 6 (1994)-29466.
Moreover, as shown in FIG. 22, there has been also known a technology of connecting a protecting element 360 having an n+/i/n+ structure between two terminals of an element to be protected, in order to significantly improve an electrostatic breakdown voltage in a compound semiconductor device. FIG. 22 shows a switching circuit device formed of FETs, each having a source 315, a gate 317 and a drain 320. In the switching circuit device, the protecting elements 360 are connected between an input terminal and a control terminal and between an output terminal and the control terminal. This technology is described for instance in International Publication WO 2004/027869 (FIG. 12).
FIG. 23 shows an integrated circuit device (hereinafter referred to as an LSI), in which a protecting element region 407 is formed around a logic circuit 408. FIG. 23 shows a protection circuit against an overvoltage caused by static electricity and the like for a MOS type IC. The protection circuit is a so-called CMOS buffer circuit type protection circuit in which protecting elements of a grounded-gate p-channel MOSFET 401 and a grounded-gate n-channel MOSFET 402 is disposed around the logic circuit 408. A signal line 403 connected to an input/output terminal pad 400 is connected to a reference voltage GND through the n-channel MOSFET 402 and to a power-supply voltage Vcc through the p-channel MOSFET 401. This technology is described for instance in Japanese Patent Application Publication No. Hei 7 (1995)-169918.
Generally, in order to protect a device from static electricity, there has been adopted a method of connecting protecting diodes in parallel with an element (device) to be protected, as in the case of the pn junction diodes in FIG. 21.
However, in a microwave device, an increase in a parasitic capacity due to connection of protecting diodes causes deterioration of high-frequency characteristics. Thus, the method described above cannot be adopted. Particularly, in a compound semiconductor device, such as a MESFET and a HEMT (high electron mobility transistor), which is used for microwaves of a GHz range or more, such as for satellite broadcasting, portable telephones and wireless broadband, it is required to secure good microwave characteristics. Thus, a gate length is also set in a submicron order, and a gate Schottky junction capacity is designed to be very small. Thus, the compound semiconductor device is very weak in electrostatic breakdown, and it is required to pay close attention to handling thereof including a MMIC in which a GaAs MESFET and a HEMT are integrated. Furthermore, in a low-frequency general consumer semiconductor for audio, video, power management and the like, a protecting diode widely used for increasing an electrostatic breakdown voltage has a pn junction. Specifically, a parasitic capacity is significantly increased to several hundred fF or more at the minimum by using the protecting diode. Thus, there is a problem that microwave characteristics of the compound semiconductor device described above are significantly deteriorated.
Meanwhile, in the switch MMIC shown in FIG. 22, n+ regions 350 are provided around a common input terminal pad IN Pad and around an OUT-1 Pad and an OUT-2 Pad for improving isolation. The n+ regions 350 and resistors R1 or R2, which are formed by ion implantation of n+ impurities, are disposed so as to get close to each other up to 4 μm. These n+ regions disposed close to each other and an insulating region (a GaAs substrate) 355 disposed between the regions form a protecting element 360.
Since the protecting element 360 has no pn junction, a parasitic capacity is as small as several fF compared with the protecting diode described above. However, it is found out that a part of an input signal inputted from the common input terminal pad IN Pad leaks into a control terminal pad Ctl-1 Pad that is a high-frequency GND potential through the resistor R1. This is because the resistor R1 and the common input terminal pad IN Pad are disposed close to each other over a long distance of 80 μm in order to enhance a protecting effect, at a point close to the control terminal pad Ctl-1 Pad.
Such a leakage of the input signal due to the parasitic capacity of about several fF does not become a problem in a switch MMIC including a MESFET as a switching element, for example. However, the leakage of the input signal becomes a problem particularly in the case where the protecting elements are connected in a switch MMIC including a HEMT having a small off capacity as a switching element. The leakage of the input signal exceeds a negligible level with respect to the small off capacity of the HEMT even by just several fF. Thus, the leakage affects the high-frequency characteristics, and an insertion loss is deteriorated compared with that in the case where the protecting elements 360 are not connected.
Moreover, in an LSI 410 such as a CMOS logic circuit element as shown in FIG. 23, performance of a MOSFET that is a basic element included in the logic circuit 408 is increasingly enhanced along with device refinement. Specifically, a gate length is getting shorter and a gate oxide film is getting thinner. However, at the same time, the element is getting weak in electrostatic breakdown. Thus, in order to protect the element, the protecting element region 407 having a plurality of protecting elements disposed therein is disposed around the logic circuit 408. However, the larger the size of the protecting element is, the more the protection effect is enhanced. Accordingly, under the present situation, an area of the protecting element region 407 has become too large compared with an area of the logic circuit 408. Thus, there is a problem that the cost for the LSI 410 is increased. Moreover, even if the size of the protecting element region 407 is increased to a certain degree or more, operations as the protecting elements become uneven. Thus, there is also a problem that the protection effect is limited. Furthermore, if the protecting element region 407 is large, large protecting elements are connected in parallel. Thus, there is also an adverse effect that a computation processing speed of the LSI 410 is reduced by the parasitic capacity of the protecting element.